Edge Detection Using SOPC Builder and DSP Builder Tool Flow

Introduction Video and image processing applications are typically very computationally intensive. Given the increasing processing demands, the parallel processing capabilities of Altera® programmable logic devices make them an attractive implementation option for highly repetitive tasks found in video and imaging functions. Instead of using multiple programmable digital signal processors, a single FPGA with an embedded Nios® II processor can deliver the requisite level of computing power more cost-effectively, while simplifying board complexity.